{-# LANGUAGE OverloadedStrings #-}
-- | Automatically generated syntax definition for Verilog.
-- DO NOT EDIT THIS FILE MANUALLY.
-- Instead, modify xml/verilog.xml and 'make bootstrap'.
module Skylighting.Syntax.Verilog (syntax) where

import Skylighting.Types
import Data.Binary

-- | Syntax definition for Verilog.
syntax :: Syntax
syntax = decode "\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vverilog.xml\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\b\NUL\NUL\NUL\NUL\NUL\NUL\NUL\nBlock name\NUL\NUL\NUL\NUL\NUL\NUL\NUL\nBlock name\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\DC1\SOH\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vCommentar 1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vCommentar 1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SI\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKAlerts\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\f\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vCommentar 2\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vCommentar 2\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\STX\SI\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKAlerts\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH*/\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\f\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SYNCommentar/Preprocessor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SYNCommentar/Preprocessor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH*/\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\f\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKNormal\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKNormal\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\CAN\DLE\RS\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\tbegin\\ *:\SOH\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\nBlock name\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bfork\\ *:\SOH\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\nBlock name\a\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\FS\t\n !%&()*+,-./:;<=>?[\\]^{|}~\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\t\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQbegin\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTcase\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQcasex\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQcasez\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTfork\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bfunction\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bgenerate\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKmodule\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTtask\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\a\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\FS\t\n !%&()*+,-./:;<=>?[\\]^{|}~\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\a\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXend\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aendcase\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vendfunction\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vendgenerate\NUL\NUL\NUL\NUL\NUL\NUL\NUL\tendmodule\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aendtask\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTjoin\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\a\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\FS\t\n !%&()*+,-./:;<=>?[\\]^{|}~\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\"\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKalways\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKassign\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTcell\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKconfig\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bdeassign\NUL\NUL\NUL\NUL\NUL\NUL\NUL\adefault\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bdefparam\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKdesign\NUL\NUL\NUL\NUL\NUL\NUL\NUL\adisable\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTedge\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTelse\NUL\NUL\NUL\NUL\NUL\NUL\NUL\tendconfig\NUL\NUL\NUL\NUL\NUL\NUL\NUL\nendspecify\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bendtable\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXfor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQforce\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aforever\NUL\NUL\NUL\NUL\NUL\NUL\NUL\STXif\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKifnone\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ainitial\NUL\NUL\NUL\NUL\NUL\NUL\NUL\binstance\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aliblist\NUL\NUL\NUL\NUL\NUL\NUL\NUL\alibrary\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vmacromodule\NUL\NUL\NUL\NUL\NUL\NUL\NUL\anegedge\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aposedge\NUL\NUL\NUL\NUL\NUL\NUL\NUL\arelease\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKrepeat\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aspecify\NUL\NUL\NUL\NUL\NUL\NUL\NUL\tspecparam\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQtable\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXuse\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTwait\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQwhile\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\a\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\FS\t\n !%&()*+,-./:;<=>?[\\]^{|}~\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ESC\NUL\NUL\NUL\NUL\NUL\NUL\NUL\tautomatic\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQevent\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKgenvar\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQinout\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQinput\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ainteger\NUL\NUL\NUL\NUL\NUL\NUL\NUL\nlocalparam\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKoutput\NUL\NUL\NUL\NUL\NUL\NUL\NUL\tparameter\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTreal\NUL\NUL\NUL\NUL\NUL\NUL\NUL\brealtime\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXreg\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bscalared\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKsigned\NUL\NUL\NUL\NUL\NUL\NUL\NUL\asupply0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\asupply1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTtime\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXtri\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTtri0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTtri1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKtriand\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQtrior\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKtrireg\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bvectored\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTwand\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTwire\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXwor\SOH\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\a\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\FS\t\n !%&()*+,-./:;<=>?[\\]^{|}~\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\v\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKhighz0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKhighz1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQlarge\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKmedium\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQpull0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQpull1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQsmall\NUL\NUL\NUL\NUL\NUL\NUL\NUL\astrong0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\astrong1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQweak0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQweak1\ETX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\a\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\FS\t\n !%&()*+,-./:;<=>?[\\]^{|}~\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SUB\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXand\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXbuf\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKbufif0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKbufif1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTcmos\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTnand\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTnmos\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXnor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXnot\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKnotif0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKnotif1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\STXor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTpmos\NUL\NUL\NUL\NUL\NUL\NUL\NUL\bpulldown\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKpullup\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQrcmos\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQrnmos\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQrpmos\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQrtran\NUL\NUL\NUL\NUL\NUL\NUL\NUL\brtranif0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\brtranif1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTtran\NUL\NUL\NUL\NUL\NUL\NUL\NUL\atranif0\NUL\NUL\NUL\NUL\NUL\NUL\NUL\atranif1\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOTxnor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETXxor\SOH\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SO[\\d_]*'d[\\d_]+\SOH\ETX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\DC3[\\d_]*'o[0-7xXzZ_]+\SOH\ETX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\CAN[\\d_]*'h[\\da-fA-FxXzZ_]+\SOH\ETX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\DC2[\\d_]*'b[01_zZxX]+\SOH\ETX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\t\EOT\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\b\STX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NAK[a-zA-Z0-9_, \\t]+\\s*:\SOH\STX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\"\b\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKString\SOH//\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vCommentar 1\SOH/*\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vCommentar 2\STX\NUL\NUL\NUL\NUL\NUL\NUL\NUL\CAN!%&()+,-<=+/:;>?[]^{|}~@\RS\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL`\DLE\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\fPreprocessor\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SI\\`[a-zA-Z_]+\\w*\SOH\DLE\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SI\\$[a-zA-Z_]+\\w*\SOH\SOH\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACK\NUL\NUL\NUL\NUL\NUL\NUL\NUL\a#[\\d_]+\SOH\ETX\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\RS\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\fPreprocessor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\fPreprocessor\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ENQ\SO\DLE\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\fSome Context\ETX\"\"\EOT\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETX<>\EOT\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH//\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\vCommentar 1\SOH/*\f\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SYNCommentar/Preprocessor\DLE\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\fSome Context\NUL\NUL\NUL\NUL\NUL\NUL\NUL\fSome Context\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\RS\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKString\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKString\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETX\SO\b\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\aVerilog\NUL\NUL\NUL\NUL\NUL\NUL\NUL\fSome Context\f\ACK\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\"\b\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\b\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NULFYevgen Voronenko (ysv22@drexel.edu), Ryan Dalzell (ryan@tullyroan.com)\NUL\NUL\NUL\NUL\NUL\NUL\NUL\SOH4\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETX\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETX*.v\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ETX*.V\NUL\NUL\NUL\NUL\NUL\NUL\NUL\EOT*.vl\NUL\NUL\NUL\NUL\NUL\NUL\NUL\ACKNormal"
