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/**
 * @file IROpcode.hpp
 * @brief Logical IR opcode enumeration
 *
 * Similar to GFX:: enum for assembly IR, this provides a unified opcode
 * system for logical IR instructions enabling fast pattern matching
 * via integer comparison instead of string comparison.
 */

#pragma once

#include <cstdint>
#include <string_view>

#include "stinkytofu/Export.hpp"

namespace stinkytofu {

/**
 * @brief Logical IR Instruction Opcodes
 *
 * Each logical IR instruction (VAddF32, VMulF32, etc.) has a unique
 * opcode for fast pattern matching and identification.
 *
 * Design notes:
 * - Similar to GFX:: enum for assembly IR
 * - Used by LogicalInstruction::getOpcode()
 * - Enables fast integer comparison in pattern matching
 * - Generated by tablegen from IRInstructionDefs.inc
 */
namespace logical {
enum Opcode : uint16_t {
    UNKNOWN = 0,

// Include generated opcode definitions
#include "LogicalOpcodes_generated.inc"

    // Special instruction opcodes (not auto-generated)
    MFMA,
    MXMFMA,
    SMFMA,
    Label,
    IntrinsicCall,

    NUM_OPCODES  // Sentinel value
};

/**
 * @brief Convert opcode to human-readable string
 * @param opcode The logical IR opcode
 * @return String representation (e.g., "VAddF32")
 */
STINKYTOFU_EXPORT const char* getOpcodeName(Opcode opcode);

/**
 * @brief Convert opcode to assembly mnemonic
 * @param opcode The logical IR opcode
 * @return Assembly mnemonic (e.g., "v_add_f32")
 */
STINKYTOFU_EXPORT const char* getOpcodeMnemonic(Opcode opcode);

/**
 * @brief Parse opcode from string
 * @param name Instruction name (CamelCase like "VMaxF32" or snake_case like "v_max_f32")
 * @return Corresponding logical IR opcode, or UNKNOWN if not found
 *
 * This function supports both naming conventions:
 * - CamelCase: "VAddF32", "VMaxF32", "VCmpGTF32"
 * - snake_case: "v_add_f32", "v_max_f32", "v_cmp_gt_f32"
 */
STINKYTOFU_EXPORT Opcode parseOpcode(const char* name);

}  // namespace logical

}  // namespace stinkytofu
